MVME2434 MOTOROLA VME 处理器模块 工控应用DCS系统领域

MVME2434 MOTOROLA VME 处理器模块 工控应用DCS系统领域

MVME2434 VME板提供了摩托罗拉PowerPlus II体系结构的性能，MVME2434并能够通过两个PCI夹层卡（PMC）完全定制以满足您的应用需求。MVME24340的灵活性提供了一个优秀的基础平台，MVME2434可以快速轻松地为各种行业特定应用进行定制。

MVME2434处理器模块利用摩托罗拉的低功耗、高性能PowerPC 750微处理器、用于车载外围设备的外围组件互连（PCI）总线、处理器/内存总线到PCI总线桥接器和VME接口，将最佳级别的灵活性和性能打包到单个VME插槽中。

MVME2434作为第二代体系结构，PowerPlus II体系结构是一种经过充分优化的处理器和总线体系结构，MVME2434以从PowerPC微处理器系列、PCI总线和VMEbus中获得最大性能。MVME2434原始PowerPlus架构中增加的功能包括支持100 MHz本地总线操作，以及使用同步DRAM（SDRAM）技术。

MVME2434基于PowerPlus II体系结构的VME处理器板的出色性能不是由单一因素造成的。PowerPlus II体系结构设计中的许多元素都有助于其出色的性能，MVME2434包括处理器/内存子系统、高速本地总线、最佳解耦体系结构、处理器与PCI的解耦，以及减少PCI延迟的高级VME接口。

The MVME2434 VME board delivers the performance of the MOTOROLA PowerPlus II architecture, and the MVME2434 can be fully customized to meet your application needs with two PCI sandwich cards (PMCS). The flexibility of the MVME24340 provides an excellent base platform, and the MVME2434 can be quickly and easily customized for a variety of industry-specific applications.

The MVME2434 processor module utilizes MOTOROLA's low-power, high-performance PowerPC 750 microprocessor, Peripheral Component Interconnect (PCI) bus for on-board peripherals, processor/memory bus to PCI bus bridge and VME interface to pack the best level of flexibility and performance into a single VME slot.

MVME2434 As a second-generation architecture, the PowerPlus II architecture is a fully optimized processor and bus architecture, MVME2434 to get maximum performance from the PowerPC microprocessor family, PCI bus, and VMEbus. Features added to the MVME2434's original PowerPlus architecture include support for 100 MHz local bus operation and the use of synchronous DRAM (SDRAM) technology.

The outstanding performance of the MVME2434 VME processor board based on the PowerPlus II architecture is not due to a single factor. Many elements of the PowerPlus II architecture design contribute to its excellent performance, and the MVME2434 includes a processor/memory subsystem, a high-speed local bus, an optimal decoupled architecture, processor decoupling from PCI, and an advanced VME interface that reduces PCI latency.