1336-BDB-SP44C A-B PCB电路板 超速保护器编码器

1336-BDB-SP44C A-B PCB电路板 超速保护器编码器

1336-BDB-SP44C A-B PCB电路板 超速保护器编码器

基本功能:

数据缓冲:由于I/0设备的速率较低而CPU和内存的速率却很高，故在控制器中必须设置一缓冲器。在输出时，用此缓冲器暂存由主机高速传来的数据，然后才以I/O设备所具有的速率将缓冲器中的数据传送给I/O设备;在输入时,缓冲器则用于暂存从I/O设备送来的数据，待接收到一批数据后，再将缓冲器中的数据高速地传送给主机。

差错控制:设备控制器还兼管对由I/O设备传送来的数据进行差错检测。若发现传送中出现了错误，通常是将差错检测码置位，并向CPU报告，于是CPU将本次传送来的数据作废，并重新进行一次传送。这样便可保证数据输入的正确性。

数据交换:这是指实现CPU与控制器之间、控制器与设备之间的数据交换。对于前者，是通过数据总线，由CPU并行地把数据写入控制器，或从控制器中并行地读出数据;对于后者，是设备将数据输入到控制器，或从控制器传送给设备。

1336-BDB-SP44C A-B PCB电路板 超速保护器编码器

Basic functions:

Data buffering: Because the I/0 device speed is low and the CPU and memory speed is high, a buffer must be set in the controller. When output, the buffer is used to temporarily store the data from the host at high speed, and then the data in the buffer is transmitted to the I/O device at the rate that the I/O device has; During input, the buffer is used to temporarily store the data sent from the I/O device, and after receiving a batch of data, the data in the buffer is transmitted to the host at high speed.

Error control: The device controller is also responsible for error detection of the data transmitted by the I/O device. If an error is found in the transmission, the error detection code is usually set and reported to the CPU, so the CPU will cancel the data sent this time and retry the transmission. This ensures the correctness of data input.

Data exchange: This refers to the realization of data exchange between the CPU and the controller, and between the controller and the device. For the former, through the data bus, the CPU writes the data to the controller in parallel, or reads the data from the controller in parallel; In the latter case, the device inputs data to the controller, or from the controller to the device.